On Tsc Checkers for M-out-of-n Codes

Design of Compact and High speed, Totally Self Checking CMOS Checkers for m-out-of-n Codes

This paper presents a novel method for designing TSC m-out-ofn code checkers taking into account a realistic fault model including stuck-at, transistor stuck-on, transistor stuck-open, resistive bridging faults and breaks. The proposed design method is the first method in the open literature that takes into account a realistic fault model and can be applied for all practical values of m and n. ...

Efficient Modular Design of TSC Checkers for M-out-of-2M Codes

Novel Single and Double Output TSC Berger Code Checkers

This paper presents a novel method for designing type-I and type-II single and double output TSC Berger code checkers taking into account a realistic fault model including stuck-at, transistor stuck-open, transistor stuckon, resistive bridging faults and breaks. A benefit of the proposed type-I single and double output checkers is that all faults are testable by a very small set of code words t...

Designing FPGA based Self-Testing Checkers for m-out-of-n Codes

The paper describes a specific method for designing selfchecking checkers for m-out-of-n codes. The method is oriented to the Field Programmable Gate Arrays technology and is based on decomposing the sum-ofminterms corresponding to an m-out-of-n code. The selftesting property of the proposed checker is proven for a set of multiple stuck-at faults at input and output poles of a Logic Cell. An es...

New efficient totally self-checking Berger code checkers

This paper presents a new method for designing totally self-checking (TSC) Berger code checkers for any number k of information bits, even for k"2r~1, taking into account realistic faults as stuck-at, transistor stuck-open, transistor stuck-on and resistive bridging faults. Doubleas well as single-output TSC checkers are given. The proposed single-output TSC Berger code checkers are the "rst in...